Workshop #3
Intelligent Computing, from Architecture to Algorithm
"AI Chip Security"
Prof. Rui HOU (CAS)
Abstract
AI chip security has gradually become a focus as important as performance, and has received widespread attention. This report will summarize the main security issues faced by AI chips from two aspects: attack and defense, including model protection, adversarial sample attack defense, and side-channel information leakage. AI chip security has gradually become a focus as important as performance, and has received widespread attention. This report will summarize the main security issues faced by AI chips from two aspects: attack and defense, including model protection, adversarial sample attack defense, and side-channel information leakage.
Prof. Rui HOU (CAS)
"Large-Scale Memristor Integration for In-Memory Computing"
Prof. Yuchao YANG (PKU)
Abstract
As Moore’s law slows down and memory-intensive tasks get prevalent, digital computing becomes increasingly capacity- and power-limited. In order to meet the requirement for increased computing capacity and efficiency in the post-Moore era, emerging computing architectures, such as in-memory computing and neuromorphic computing architectures based on memristors, have been extensively pursued and become an important candidate for new-generation non-von Neumann computers. Here we report large-scale memristor integration and its applications for in-memory computing chips.
Prof. Yuchao YANG (PKU)
"Circuits and Architecture of Asynchronous Neuromorphic Intelligent Computing Chip"
Prof. Zhiyi YU (SYSU)
Abstract
Traditional Computing chips are facing great challenges in performance and power efficiency. Neuromorphic chips, which are considered as the next generation intelligent computing chips, have features such as large-scale parallelization, event-driven computing, and autonomous learning, and have great potential to obtain high performance and ultra-low power consumption. This report will discuss several key technologies of circuits and architectures for neuromorphic computing chips, including: 1) Automatic design process and EDA tools for asynchronous circuits, and efficient data-driven asynchronous circuit design scheme; 2) Use large-scale interconnection to solve the scalability problems; 3) System level software and hardware cooperation, and the applications of neuromorphic computing chips in the field of event camera sensing and computing.
Prof. Zhiyi YU (SYSU)
"Brain Inspired Large Models with Spiking Neural Networks"
Prof. Guoqi LI (CAS)
Abstract
Brain-inspired intelligence focuses on technologies inspired by the information processing mechanism of the human brain, based on the structure and function of neurons and neural circuits, and it aims to build computing systems with more general artificial intelligence. In recent years, spiking neural networks (SNNs) have approached the mainstream network performance of traditional deep learning in general scenarios, showing the potential to lead future intelligent technologies. This report introduces the models, algorithms of SNNs and their deployment on Brain inspired chips, as well as the research progress of large models based on SNNs.
Prof. Guoqi LI (CAS)